Journal of Advanced Computing, Communication and Technologies


Volume 4 - Issue 3

Volume 4 - Issue 3

1. A High-Speed and Power-Efficient Voltage Level Shifter for Dual-Supply Applications
A new design method for high performance level shifting circuits is presented in this paper. We propose two level shifting circuits that reduce problems that exist in complementary level shifting circuits described previously. Using LTSPICE parameters of a 0.35um CMOS process, simulations have been performed under various capacitive loading and operating conditions. The simulation results show that our design method can achieve 16.6% low-to-high propagation delay decrease and 27.2% low-to-high power delay product improvement when converting 3.3V to 5V compared with conventional level shifting circuits. In addition, as the working voltages being converted are reduced, the design yields still greater advantage without degrading circuit performance.

2. Implementation Of Sleep Transistor Based SRAM Using Resonant Supply Boosting For Low Power Application
Lavanya.S, Gunasekaran.M.
This paper presents a novel resonating inductor based supply boosting scheme for low-voltage static random-access memories and logic in deep 14-nm silicon Von insulator (SOI) FinFET technologies. The technique combines capacitive (C) and inductive (L) boosting for the first time. Simulation and measured hardware results from a 14-nm test chip show that this new technique is able to improve Vmin (down to 0.3 V), functional yield, and access time, when compared with designs with or without capacitive-boosted supplies. Simulations also reveal the optimal combinations of “L” and “C” needed for each Vdd to achieve minimal boost voltage, where the static random-access memory can be rendered fully functional in the absence of any assist circuitry. Furthermore, the resonant supply provides power savings compared with a boosted supply alone.

3. High performance and low power 2D DWT architecture for identification of carotid asymptomatic plague in FPGA
Dhivya.K, Sasikala.D.
In literature the carotid artery asymptomatic plaque identification has been done using the texture features at various orientation scales. The plaque region has been segmented using cubic spline interpolation method for multiresolution analysis using discrete wavelet transform. The features have been extracted using various scale and orientation of detail sub images using Gabor filters. It has been found from the analysis that the horizontal detail images have significantly greater values of the features than vertical detail images for symptomatic subjects. However, the horizontal detail images have shown low values compared to the vertical detail images for asymptomatic subjects. The algorithm is found to be simple and accurate for identifying the asymptomatic plaque clinically using less number of features. In this project the hardware implementation of the above algorithm will be developed. The main block of the above architecture is the 2D wavelet transform. A high performance VLSI based DWT architecture for 2D carotid image analysis will be proposed. The proposed method based on lifting based scheme against. The existing convolution based scheme. The digital data from carotid image will be given to DWT architecture for image analysis.

4. FPGA Implementation of ECG Signal Analysis for Clinical Care Diagnosis
Kowsalya.S, Karthikeyan.V.
In present days, several types of developments are carried towards the medical application. There are many methods to process the ECG signal. The accurate value of ECG signal is obtained by processing P, Q, R, and S signal from ECG output. Electrocardiogram is used to provide the information about heart beat condition. Analysis of the ECG waveform is used to identify whether the heart beat rate is normal and abnormalities. The heart beat is the important parameter to identify whether patient contains any disease or not. To rectify this problem a novel method is proposed to feature extract based on FPGA by using the QSW. The QSW method removes the low power noises from the input ECG after signal is passed through the feature extraction part. The feature extraction is used to separate the ECG signal into heartbeat without noise. The output shows that the baby condition is normal or abnormal and it shows whether the patient contain any disease or not. The proposed design is simulated and comparison parameters are obtained in Quartus II 9.1.

5. IoT Based Biometric Electronic Voting Machine

Mahendran.S, Karthikka.T, Nivitha.C, Ragulnarayanan.V, Ramya.R


This paper focuses on simple,low cost fingerprint based electronic voting machine using Raspberrypi 3. An electronic voting system is a voting system in which the voters’ and voting data is recorded, stored and processed digitally. The proposed system consists of controller hardware and software. The hardware is implemented with Raspberrypi microcontroller along with R305 finger-print module. The proposed system gives the best solution for minimizing the time taken for identifying the voter. The designed system is user-friendly, easily adaptable and cost-effective. The Liquid Crystal Display unit provides the voter friendly interface guiding through the procedure of voting. Further, the designed system has simple architecture, fast response time and scope for further expansion.

6. Design and Analysis of 8-bit Magnitude Comparator using GDI Technique

Rajaganapathi.T, Dharani.T, Swathi.R, Yageshwaran.P


In this paper 8-bit magnitude comparator is designed using GDI Technique. In recent years, low power design has become one of the prime focuses for the digital VLSI Circuit. Gate Diffusion Input(GDI) Technique is the power efficient method for digital circuits. In this paper , 8-bit magnitude comparators are designed by cascading two 4-bit magnitude comparators using both GDI and CMOS Technique. GDI Technique is one the low power designing method which has a less transistor count. Finally power consumption of CMOS and GDI are compared in this proposed system.

7. Design of Ring Counter Using Embedded Logic Flip-Flop

Prabhu.A.S, Gokul Vasanth.B, Sibi Kumar.G.P, Vidhya.C


The main aim of Embedded Logic Flip-Flop is to incorporate logic functions with-in the flip flop to reduce the delay, area and power dissipation. It has an application in counters and registers. The proposed method aims on Embedded Logic Flip-Flop (ELFF)which has low power dissipation can be used to design the 4-bit ring counter. The ELFF has been adopted from the Dual Dynamic Flip-Flop (DDFF).This Embedded Logic Flip-Flop will reduce the area, delay and power dissipation compared to DDFF-ELM. According to the estimation done, average power of Cross Charge Control Flip-Flop (XCFF), Dual Dynamic Flip-Flop (DDFF), Dual Dynamic Flip-Flop-Embedded Logic Module (DDFF-ELM) and Embedded Logic Flip-Flop (ELFF) are tabulated. The comparisons are made in 180nm CMOS Technology. The designs are stimulated in LT Spice.

8. Design and Implementation of Vedic Multiplier using GDI logic

Velmurugan.T, Keerthana.S, Raghavi.T.N, Vijayabharathi.P


There is many advancement in VLSI technology and there are many designing styles of VLSI circuits. Some of them are CMOS; PTL and GDI techniques (Gate Diffusion Input).GDI technique is a low power digital combinatorial circuit by which we can eradicate the disadvantages of CMOS, PTL techniques. This technique involves advantages of reducing power consumption, propagation delay and area of digital circuits while controlling low complexity of logic design. The different strategy are also compared with respect to the layout area; transistor count, delay and power dissipation are discussed here in this paper showing advantages of GDI  and  power comparison of GDI compared to CMOS circuit.


Vijaya kumar.S.D, Hannah Rupa.M, Divyabharathi.P, Bharath Kumar.M,  Boobalan.R


Wireless links are loss due to interference and fading channel. Because of this loss, Previously send duplicate packets to enhance the transmission. But the bandwidth consumption is more in the previous routing method. Bandwidth is more important in the communication. In this paper,a multicast routing protocol that constructs multiple multicast trees and network coding satisfies the predefined protocol. The proposed protocol can reduce the bandwidth guarantee. Estimating the available bandwidth by variable bit rate (VBR).These improves the bandwidth availability in the network.

10. Implementation of Vehicle tracking System Using GPS with Password Lock

Tamilarasi.M, Aathirai.P, Gowri sangar.E, Keerthana.P, 


GPS based vehicle tracking system based on the PIC micro controller using global positioning system (GPS) and global system for mobile communication (GSM) .This is a cheaper solution than a two-way GPS communication system wherein communication is done in both ways with GPS satellites. This project uses only one GPS device and two-way communication is achieved using a GSM. GSM modem with a SIM card used here implements the same communication technique as in a regular cell phone. The system can be mounted or fitted in your vehicle in a hidden or suitable compartment. After this installation, you can easily track your vehicle using your mobile phone. This system allows you to track your vehicle anytime and anywhere. Whether you own a company with a fleet of hundreds of vehicles or you have expensive piece of equipment and you want to keep an eye on them, this tracking system can inform you of the status without you having to be actually present on the site. Here we can fix a speed limit and if it exceeds it will come as a warning message to user mobile number. SOS used to give the last location of the vehicle. If there is any problem in the vehicle and also the driver wants to alert the owner he can use the panic switch. For safety purpose password lock is used.


Shanmugham.M, Arunkumar.S, Pavithra.S, SakthiSangeethaDevi.P


Automatic LPG booking and leakage detection system is proposed in this paper. The aim of this paper is to monitoring gas leakage to avoid fire accidents .This system detects the leakage of the LPG using MQ2 sensor and alert the consumer about the gas leakage by sending message using GSM module. The additional advantage of the system is that it continuously monitors the level of the LPG present in the cylinder using load cell and automatically books the cylinder using a GSM module.


Shanmugham.M, Sangavi.L, Vitharcchana.M, Sivachalapathy.B


This paper proposes an intelligent pillbox with remind and consumption function. Which is used to give alert for the user to take pills at a particular time and the pills required to take at that time will be in open position for the corresponding session of the pill box to avoid confusion among medicines. Intelligent pill box can reduce family member’s responsibility towards giving the correct and timely consumption of medicines for the old peoples. Along with that it also helpful for the patients likes deaf, dumb and blind for to take the corresponding tablets at the particular time. This system gets the feedback about pills from the user and Send purchase order to medical shop.


Kumar.V, Gokulpriya.D, Subharatha.R , Dineash.V


India is an agricultural country, wherein about 70% of the population depends on agriculture. Today, in agricultural plant disease is the significant concern as it reduces the production and quality of food. Hence there is a need to detect the plant diseases at the early stage. Detection of disease in the Banana tall plant is a major challenge in the field of agriculture. Banana leaf and fruit are highly affected by a disease. Hence we are going to detect the disease at the initial stage by using image processing and to classify the disease by using ANN. The methodology involves image acquisition, image pre-processing, image segmentation, feature extraction and detection and the classification of diseases. Results were obtained on these images by experimental simulations in MATLAB.


Velmurugan.T, Swathi.N, Ranjani.D, Prabadevi.A


Reversible logic is the currently going field in the research which results in low heat dissipation and low power consumption. This is the main factor to apply reversible logic in VLSI circuit design. In this paper, half adder, full adder and 4x4 multiplier are proposed using reversible logic. The objective is to reduce area and power consumption in adder and multiplier. These are designed using the basic reversible gates like Feynman, Fredkin and Toffoli gates.  By using this reversible logic, number of gates, garbage outputs and constant inputs are reduced. The designed circuits are much more efficient and optimized as compared to the existing method.


Rajeswari, Vignesh.L, Naveen Kumar.P, Sivanesan


Electroencephalogram (EEG) signal is very complex and random in nature. It is contaminated with many artifacts such as power line noise, baseline noise because of its lower amplitude. Similarly Electromyogram (EMG), Electrocardiogram (ECG) signals have been contaminated by power line, baseline noises. These artifacts contaminated the property of the original signal. These signals cannot be properly analyzed due to the presence of the artifacts; so that we have to remove these noises before processing the raw signal. Powerline interference is the most common artifact that corrupts the EEG record of every patient. This paper emphasizes on to removing Powerline artifact with an efficient denoising algorithm DWT (Discrete Wavelet Transform). The implementation will be held in Matlab R2014a.


Jagdeesan.S, Nivethitha.T, Pethantchi priya.V, Preethi bastina.S, Priyadharshini.D


Convergence of IoT and Raspberrypi 3 has greatly promoted the secured data transmission in healthcare. Healthcare needs a secured data transmission in order to protect the database. Healthcare has developed more and more but also there are some problems like hacking the patients details. In order to overcome that we have to develop an efficient system for measuring and transmitting the medical data of patient. For that we use Raspberrypi 3 as controlling unit and heart beat sensor, Temperature sensor and Light sensor as sensing unit of our proposed system. The android app(TCP tool)is used to send the data from the kit to server.